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III-V-MOS: “Technology CAD for III-V Semiconductor-based MOSFETs”

Funding agency: EC (European Commission) under the FP7 Programme (Collaborative project, grant agreement n. 619326).

Project members/Partners:  CONSORZIO NAZIONALE INTERUNIVERSITARIO PER LA NANOELETTRONICA (IUNET), Italy (Project Coordinator, Prof. Luca Selmi, University of Udine; involved IUNET units: University of Udine, University of Bologna, University of Modena-Reggio Emilia); ETH Zurich, Switzerland; IMEC, Belgium; IBM RESEARCH GMBH, Switzerland; QuantumWise A/S, Denmark; GLOBALFOUNDRIES, Dresden, Germany; SYNOPSYS, Switzerland; INSTITUT SINANO ASSOCIATION, France.

Researchers @ UniMORE: Paolo Pavan and Giovanni Verzellesi

Start date: 01/11/2013

End date: 30/10/2016

According to the ITRS (International Technology Roadmap for Semiconductors), III-V compound semiconductor n-type MOSFETs will reach production in 2018 as part of a new scaling scenario for high performance at very low voltage. The present lack of dependable TCAD models for the early stages of industrial development is a hindrance to benefit from the cost saves and time to market reduction that TCAD is recognized to deliver. To bridge this gap, III-V-MOS aims to provide to the European Semiconductor Industry accurate device simulation models and methods, integrated into TCAD tools, for successful introduction in CMOS technology of optimized device designs based on III-V MOSFETs at and beyond the 14nm node. III-V-MOS will develop, validate and transfer to industry a new device simulation methodology enabling the use of accurate quantum drift-diffusion and Monte Carlo TCAD tools.  The models, calibrated by comparison with measurements on complete devices and ad-hoc test structures, will provide comprehensive descriptions of Ultra Thin Body Semiconductor on Insulator FETs, FinFETs and nanowire FETs at and beyond the 14nm node including device parasitics. A hierarchical approach will be used, starting from atomistic band structure calculations all the way down to customized TCAD simulation setups ready for direct use in an industrial environment. Systematic application of the new methodology under industrial guidance will provide new insight in nanoscale III-V semiconductor device physics and identify the potential of the technology boosters, thus substantially reducing the options to be explored for the device design and the corresponding costs. Future exploitation and high impact of the project results are guaranteed by the TCAD market leader (Synopsys); by a SME specialized in the growing business of atomistic simulations for technology development (QuantumWise); by a research center (IMEC) and an industry lab (IBM) engaged in CMOS fabrication technology development and by the European foundry  GLOBALFOUNDRIES Dresden.

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