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ANDREA PADOVANI - Publications

Publications on International Journals

[J45] R. Thamankar, N. Raghavan, J. Molina, F. M. Puglisi, S. J. O'Shea, K. Shubhakar, L. Larcher, P. Pavan, A. Padovani and K. L. Pey, "Single vacancy defect spectroscopy on HfO2 using random telegraph noise signals from scanning tunneling microscopy," Journal of Applied Physics, vol. 119, no. 8, p. 084304, Feb. 2016. (AIP link)

[J44] F. M. Puglisi, L. Larcher, A. Padovani and P. Pavan, "Operations, Charge Transport, and Random Telegraph Noise in HfOx Resistive Random Access Memory: a Multi-scale Modeling Study," MRS Advances, vol. 1, no. 5, pp. 327-338, January 2016.  (MRS Advances link)

[J43] F. Hui, P. Vajha, Y. Shi, Y. Ji, H. Duan, A. Padovani, L. Larcher, X.-R. Li, J.-J. Xu and M. Lanza, "Moving graphene devices from lab to market: advanced graphene-coated nanoprobes," Nanoscale, 2015. DOI: 10.1039/c5nr06235g (Nanoscale link)

[J42] F. M. Puglisi, L. Larcher, A. Padovani, P. Pavan, "A Complete Statistical Investigation of RTN in HfO₂-Based RRAM in High Resistive State," IEEE Transaction on Electron Devices, vol. 62, no. 8, pp. 2606-2613, August 2015. (IEEEXplore link)

[J41] F. M. Puglisi, P. Pavan, L. Larcher, A. Padovani, "Statistical analysis of random telegraph noise in HfO2-based RRAM devices in LRS," Solid-State Electronics, vol. 113, pp. 132-137, November 2015. (Elsevier link)

[J40] A. Padovani, L. Larcher, O. Pirrotta, L. Vandelli, and G. Bersuker "Microscopic Modeling of HfOₓ RRAM Operations: From Forming to Switching," IEEE Transaction on Electron Devices, vol. 62, no. 6, pp. 1998-2006, June 2015. (IEEEXplore link)

[J39] F. M. Puglisi, P. Pavan, A. Padovani, L. Larcher, "A study on HfO2 RRAM in HRS based on I–V and RTN analysis," Solid-State Electronics, vol. 102, pp. 69-75, December 2014. (Elsevier link)

[J38] L. Larcher, O. Pirrotta, F. M. Puglisi, A. Padovani, P. Pavan, L. Vandelli, "Progresses in modeling HfOx RRAM operations and variability," ECS Transactions - 2014 ECS and SMEQ Joint International Meeting, vol. 64, no. 14, pp. 49-60, October 2014. (ECS link)

[J37] L. Larcher, F. M. Puglisi, P. Pavan, A. Padovani, L. Vandelli, and Gennadi Bersuker, "A Compact Model of Program Window in HfOx RRAM Devices for Conductive Filament Characteristics Analysis," IEEE Transaction on Electron Devices, vol. 61, no. 8, pp. 2668-2673, August 2014.

[J36] L. Vandelli, L. Larcher, D. Veksler, A. Padovani, G. Bersuker, and K. Matthews, "A Charge-Trapping Model for the Fast Component of Positive Bias Temperature Instability (PBTI) in High-κ Gate-Stacks," IEEE Transaction on Electron Devices, vol. 61, no. 7, pp. 2287-2293, July 2014. (IEEEXplore link)

[J35] W.H. Liu, A. Padovani, L. Larcher, N. Raghavan, and K.L. Pey, "Analysis of Correlated Gate and Drain Random Telegraph Noise in Post-Soft Breakdown TiN/HfLaO/SiOx nMOSFETs," IEEE Electron Device Letters, vol. 35, no. 2, pp. 157-159, February 2014. (IEEEXplore link)

[J34] L. Larcher, A. Padovani, L. Vandelli, "A simulation framework for modeling charge transport and degradation in high-k stacks," Journal of Computational Electronics, vol. 12, no. 4, pp. 658-665, December 2013. (Springer link)

[J33] O. Pirrotta, L. Larcher, M. Lanza, A. Padovani, M. Porti, M. Nafría, G. Bersuker, "Leakage current through the poly-crystalline HfO2: Trap densities at grains and grain boundaries," Journal of Applied Physics, vol. 114, no. 13, p. 134503, Sept 2013. (AIP link)

[J32] A. Padovani, N. Raghavan, L. Larcher, and K. L. Pey, "Identifying the First Layer to Fail in Dual Layer SiOx/HfSiON Gate Dielectric Stacks," IEEE Electron Device Letters, vol. 34, no. 10, pp. 1289-1291, 2013. (IEEEXplore link)

[J31] N. Raghavan, A. Padovani, X. Li, X. Wu, V.L. Lo, M. Bosman, L. Larcher and K.L. Pey, "Resilience of Ultra-Thin Oxynitride Films to Percolative Wear-Out and Reliability Implications for High-k Stacks at Low Voltage Stress,"Journal of Applied Physics, vol. 114, p. 094504, September 2013. (AIP link)

[J30] K. G. Young-Fisher, G. Bersuker, B. Butcher, A. Padovani, L. Larcher, D. Veksler, and D. C. Gilmer, "Leakage Current - Forming Voltage Relation and Oxygen Gettering in HfOx RRAM Devices," IEEE Electron Device Letters, vol. 34, no. 6, pp. 750-752, June 2013. (IEEEXplore link)

[J29] F. M. Puglisi, P. Pavan, A. Padovani, L. Larcher, and G. Bersuker, "RTS Noise Characterization of HfOx RRAM in High Resistive State," Solid-State Electronics, vol. 84,  pp. 160-166, June 2013. (Elsevier link)

[J28] L. Vandelli, A. Padovani, L. Larcher, and G. Bersuker, "Microscopic Modeling of Electrical Stress -Induced Breakdown in Poly-Crystalline Hafnium Oxide Dielectrics," IEEE Transaction on Electron Devices, vol. 60, no. 5, pp. 1754-1762, May 2013. (IEEEXplore link)

[J27] A. Padovani, L. Larcher, G. Bersuker, and P. Pavan, "Charge Transport and Degradation in HfO2 and HfOx Dielectrics," IEEE Electron Device Letters, vol. 34, no. 5, pp. 680-682, May 2013. (IEEEXplore link)

[J26] F. M. Puglisi, L. Larcher, G. Bersuker, A. Padovani, and P. Pavan, "An Empirical Model for RRAM Resistance in Low- and High-Resistance States," IEEE Electron Device Letters, vol. 34, no. 3, pp. 387-389, March 2013. (IEEEXplore link)

[J25] F. M. Puglisi, P. Pavan, A. Padovani, and L. Larcher, "Perimeter and Area Current Components in HfO2 and HfO2-x MIM Capacitors," Journal of Vaacum Sience and Technology B, vol. 31 (17th Workshop on Dielectrics in Microelectronics 2012 (WoDiM)), vol. 1, p. 01A117-1, Jan 2013. (AIP link)

[J24] A. Padovani, L. Larcher, and P. Pavan "Compact Modeling of TANOS Program/Erase Operations for SPICE-like Circuit Simulations," Microelectronics Journal, vol.44(1), pp. 50-57, January 2013. (Elsevier link)

[J23] A. Padovani, A. Arreghini, L. Vandelli, L. Larcher, G. Van den Bosch, J. Van Houdt, "Evidences for vertical charge dipole formation in charge-trapping memories and its impact on reliability," Applied Physics Letters, vol. 101, pp. 053505, July 2012.

[J22] S. Cimino, A. Padovani, L. Larcher, V.V. Afanas’ev, H.J. Hwang, Y.G. Lee, M. Jurczac, D. Wouters, B.H. Lee, H. Hwang and L. Pantisano, "A study of the leakage current in TiN/HfO2/TiN capacitors," Microelectronic Engineering, vol. 95, pp. 71-73, July 2012. (Elsevier link)

[J21] G. Bersuker, D. C. Gilmer, D. Veksler, P. Kirsch, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, and M. Nafría "Metal Oxide RRAM Switching Mechanism Based on Conductive Filament Properties," Journal of Applied Physics, vol. 110, p. 124518, December 2011. (AIP link)

[J20] W.H. Liu, K.L. Pey, X. Wu, N. Raghavan, A. Padovani, L. Larcher, L. Vandelli, and M. Bosman, T. Kauerauf "Threshold Shift Observed in Resistive Switching in Metal-Oxide-Semiconductor Transistors and the Effect of Forming Gas Anneal," Applied Physics Letters, vol. 99, p. 232909, December 2011.

[J19] G. Bersuker, J. Yum, L. Vandelli, A. Padovani, L. Larcher, V. Iglesias, M. Porti, M. Nafría, K. McKenna, A. Shluger, P. Kirsch and R. Jammy, "Grain boundary-driven leakage path formation in HfO2 dielectrics," Solid-State Electronics, vol. 65-66, pp. 146-150, November-December 2011. (Elsevier link)

[J18] A. Padovani, A. Arreghini, L. Vandelli, L. Larcher, G. Van den Bosh, P. Pavan, and J. Van Houdt, "A Comprehensive Understanding of the Erase of TANOS Memories Through Charge Separation Experiments and Simulations," IEEE Transactions on Electron Devices, vol. 58, no. 9, pp. 3147-3155, September 2011. (IEEEXplore link)

[J17] L. Vandelli, A. Padovani, L. Larcher, R.G. Southwick III, W.B. Knowlton, and G. Bersuker, "A Physical model of the temperature dependence of the current through SiO2/HfO2 stacks," IEEE Transactions on Electron Devices, vol. 58, no. 9, pp. 2878-2887, September 2011. (IEEEXplore link)

[J16] A. Padovani, L. Larcher, V. Della Marca, P. Pavan, H. Park, and G. Bersuker, "Charge trapping in alumina and its impact on the operation of metal-alumina-nitride-oxide-silicon memories: experiments and simulations,"  Journal of Applied Physics, vol. 110, p. 014505, July 2011.

[J15] (INVITED) L. Larcher, A. Padovani, L. Vandelli, and G. Bersuker, "Physical modeling of charge transport and degradation in HfO2 stacks for logic device and memory applications," ECS Transactions - ULSI vs. TFT Conference, vol. 37, no. 1, pp. 189-187, June 2011.

[J14] G. Bersuker, D. Veksler, C. D. Young, H. Park, W. Taylor, P. Kirsch, R, Jammy, L. Morassi, A. Padovani, and L. Larcher, "Connecting electrical and structural dielectric characteristics," International Journal of High Speed Electronics and Systems (IJHSES), vol. 20(1), pp. 65-79, 2011.

[J13] (INVITED) L. Larcher, A. Padovani, L. Vandelli, and P. Pavan, "Charge Transport in High-k Stacks for Charge-Trapping Memory Applications: a Modeling Perspective," Microelectronic Engineering (INFOS'11 Special Issue), vol. 88, no. 7, pp. 1168-1173, 2011.

[J12] L. Morassi, A. Padovani, G. Verzellesi, D. Veksler, I. Ok, and G. Bersuker, "Interface-trap effects in inversion-type enhancement-mode InGaAs/ZrO2 n-channel MOSFETs," IEEE Transactions on Electron Devices, vol. 58(1), pp. 107-114, January 2011. (IEEEXplore link)

[J11] (INVITED) L. Larcher and A. Padovani "High-k related reliability issues in advanced Non-Volatile Memories," Microelectronics Reliability, vol.50(9-11), pp. 1251-1258, September-November 2010. (Elsevier link)

[J10] S. Cimino, A. Padovani, L. Larcher, V.V. Afanas’ev, H. J. Hwang, Y. G. Lee, M. Jurczac, D. Wouters, B.H. Lee, H. Hwang, and L. Pantisano, "Leakage Current in TiN/HfO2/TiN MIM Capacitors and Degradation Due to Electrical Stress," ECS Transactions - Las Vegas, NV Volume 33, pp. 537-543, "Physics and Technology of High-k Materials 8", from the Las Vegas, NV meeting, 2010. (ECS link)

[J09] A. Suhane, A. Arreghini, G. Van den bosch, L. Vandelli, A. Padovani, L. Breuil, L. Larcher, K. De Meyer and J. Van Houdt, "Experimental assessment of electrons and holes in erase transient of TANOS and TANVaS memories," IEEE Electron Device Letters, vol. 31(9), pp. 936-938, September 2010. (IEEEXplore link)

[J08] A. Padovani, L. Morassi, N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, "A Physical Model for Post-Breakdown Digital Gate Current Noise," IEEE Electron Device Letters, vol. 31(9), pp. 1032-1034, September 2010. (IEEEXplore link)

[J07] A. Padovani, L. Larcher, D. Heh, G. Bersuker, V. Della Marca, and P. Pavan, "Temperature Effects on Metal-Alumina-Nitride-Oxide-Silicon Memory Operations," Applied Physics Letters, vol. 96(23), p. 223505, June 2010. (APL link)

[J06] A. Padovani, L. Larcher, D. Heh, and G. Bersuker, "Modeling TANOS Memory Program Transients to Investigate Charge Trapping Dynamics," IEEE Electron Device Letters, vol. 30(8), pp. 882-884, August 2009. (IEEEXplore link)

[J05] L. Larcher, P. Pavan, A. Padovani and G. Ghidini, "A technique to extract high-k IPD stack layer thicknesses from C-V measurements," IEEE Electron Device Letters, vol. 30(6), pp. 653-655, June 2009. (IEEEXplore link)

[J04] L. Larcher, A. Padovani, P. Pavan, P. Fantini, A.Calderoni, A. Mauri and A. Benvenuti, "Modeling NAND Flash memories for IC design," IEEE Electron Device Letters, vol. 29(10), pp. 1152-1154, October 2008. (IEEEXplore link)

[J03] A. Padovani, L. Larcher, P. Pavan, "Hole Distributions in Erased NROM Devices: Profiling Method and Effects on Reliability," IEEE Transactions on Electron Devices, vol. 55(1), pp. 343-349, January 2008. (IEEEXplore link)

[J02] (INVITED) A. Padovani, L. Larcher, A. Chimenton, P. Pavan, P. Olivo, "Dielectric Reliability for Future Logic and Non-Volatile Memory Applications: a Statistical Simulation Analysis Approach," ECS Transactions - ULSI vs. TFT Conference, vol. 8(1), pp. 237-242, July 2007. (ECS link)

[J01] A. Padovani, L. Larcher, P. Pavan, L. Avital, I. Bloom, and B. Eitan, "Id-Vgs Based Tools to Profile Charge Distributions on NROM Memory Devices," IEEE Transactions on Device and Materials Reliability, vol. 7(1), pp. 97-104, March 2007. (IEEEXplore link)

 

Publications on International Conferences

[C65] L. Larcher, G. Sereni, A. Padovani, L. Vandelli,  "Electrical Defect Spectroscopy and Reliability Prediction Through a Novel Simulation-Based Methodology," IEEE International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Taiwan, April 25-27, 2016, pp. 95-96.

[C64] M. Pešić, F. Fengler, S. Slesazeck, U. Schröder, T. Mikolajick, L. Larcher, A. Padovani,  "Root Cause of Degradation in Novel HfO2-based Ferroelectric Memories," 54th IEEE International Reliability Physics Symposium (IEEE IRPS), Pasadena (CA), USA, April 17-21, 2016.

[C63] F. M. Puglisi, L. Larcher, A. Padovani, P. Pavan,  "Characterization of Anomalous Random Telegraph Noise in Resistive Random Access Memory," 45th European Solid-State Device Research Conference (ESSDERC), Graz, Austria, 14 - 18 September, 2015, pp. 270-273.

[C62] F. M. Puglisi, P. Pavan, L. Vandelli, A. Padovani, M. Bertocchi, L. Larcher,  "Microscopic Physical Description of RTN Current Fluctuations in HfOx RRAM," 53th IEEE International Reliability Physics Symposium (IEEE IRPS), Monterey (CA), USA, April 19-23, 2015.

[C61] A. Padovani, L. Larcher, L. Vandelli, M. Bertocchi, R. Cavicchioli, D. Veksler and G. Bersuker,  "Cross-Correlation of Electrical Measurements via Physics-Based Device Simulations: Linking Electrical and Structural Characteristics," 28th IEEE International Conference on Microelectronic Test Structures, Phoenix (AZ), USA, 23-26 March 2015.

[C60] O. Pirrotta, A. Padovani, L. Larcher, L. Zhao, B. Magyari-Köpe, Y. Nishi,  "Multi-scale Modeling of Oxygen Vacancies Assisted Charge Transport in Sub-Stoichiometric TiOx For RRAM Application," International Conference on Solid State Devices and Materials (SSDM), Tsukuba, Japan, 08-11 September 2014.

[C59] F. M. Puglisi, L. Larcher, P. Pavan, A. Padovani, G. Bersuker,  "Analysis of RTN and cycling variability in HfO2 RRAM devices in LRS," 44th European Solid-State Device Research Conference (ESSDERC), Venice, Italy, 22 - 26 September, 2014, pp. 246-249.

[C58] F. M. Puglisi, L. Larcher, P. Pavan, A. Padovani, G. Bersuker,  "Instability of HfO2 RRAM devices: comparing RTN and cycling variability," 52th IEEE International Reliability Physics Symposium (IEEE IRPS), Kona (HI), USA, June 1-5, 2014, pp. MY.5.1-MY.5.5.

[C57] F. M. Puglisi, D. Veksler, K. Matthews, G. Bersuker, L. Larcher, A. Padovani, L. Vandelli, P. Pavan,  "Defect density evaluation in a high-k MOSFET gate stack combining experimental and modeling methods," 52th IEEE International Reliability Physics Symposium (IEEE IRPS), Kona (HI), USA, June 1-5, 2014, pp. GD.4.1-GD.4.1.

[C56] G. Bersuker, B. Butcher, D. C. Gilmer, L. Larcher, A. Padovani, R. Geer, and P. D. Kirsch, "Dielectric Morphology and RRAM Resistive Switching Characteristics," Materials Research Society Symposium Proceedings, San Francisco (USA), April 21-25, 2014.

[C55] G. Bersuker, B. Butcher, D. Gilmer, L. Larcher, A. Padovani, L.Vandelli, R. Geer, P. D. Kirsch,  "Connecting the Physical and Electrical Properties of Hafnia-based RRAM," IEEE International Electron Devices Meeting (IEEE IEDM), Washington, USA, 9-11 December, 2013, pp. 585-588.

[C54] (INVITED) B. Butcher, G. Bersuker, D. Gilmer, P. Kirsch, L. Larcher, A. Padovani, "Connecting RRAM Performance to the Properties of the Hafnia-based Dielectrics," 43rd European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania 16-20 September, 2013, pp. 163-165.

[C53] F. M. Puglisi, P. Pavan, A. Padovani, and L. Larcher, "Random Telegraph Noise Analysis to Investigate the Properties of Active Traps of HfO2-Based RRAM in HRS," 43rd European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania 16-20 September, 2013, pp. 166-169.

[C52] ( BEST PAPER AWARD ) F. M. Puglisi, P. Pavan, A. Padovani, and L. Larcher, "A Compact Model of Hafnium-Oxide-Based Resistive Random Access Memory," International Conference on IC Design and Technology (ICICDT), Pavia, Italy, 29 - 31 May, 2013, pp. 85-88.

[C51] B. Butcher, G. Bersuker, L. Vandelli, A. Padovani, L. Larcher , A. Kalantarian, R. Geer, D.C. Gilmer,  "Modeling the Forming Process for Low-Power HfO2-based RRAM," IEEE International Memory Workshop (IEEE IMW), Monterey, CA, USA, May 26-29, 2013, pp. 52-55.

[C50] T. Cabout, L. Perniola, V. Jousseaume, H. Grampeix, J.F. Nodin, A. Toffoli, E. Jalaguier, E. Vianello, G. Molas, G. Reimbold, B. De Salvo, O. Pirrotta, A. Padovani, L. Larcher, T. Diokh, P. Candelier, M.Guillermet, M. Bocquet, C. Muller "Temperature impact (up to 200 °C) on performance and reliability of HfO2-based RRAMs," IEEE International Memory Workshop (IEEE IMW), Monterey, CA, USA, May 26-29, 2013, pp. 116-119.

[C49] G. Broglia, M. Montorsi, L. Larcher, A. Padovani, "Structural influences on resistive switching in hafnium based resistive RAM devices: a Molecular Dynamics study," accepted at the 10th Pacific Rim Conference on Ceramic and Glass Technology, to be held in San Diego(CA), USA, June 2-7, 2013.

[C48] D. Veksler, G. Bersuker, L. Vandelli, A. Padovani, L. Larcher, A. Muraviev, B. Chakrabarti, E. Vogel, D. C. Gilmer, and P. D. Kirsch "Random telegraph noise (RTN) in scaled RRAM devices," 51th IEEE International Reliability Physics Symposium (IEEE IRPS), Monterey (CA), USA, April 14-18, 2013, pp. MY.10.1-MY.10.4.

[C47] B. Traore, K.-H. Xue, E. Vianello, G. Molas, A. Padovani, O. Pirrotta, L. Larcher, P. Blaise, L. Fonseca, B. De Salvo, and Y. Nishi "Investigation of the role of electrodes on the retention performance of HfOx based RRAM cells by experiments, atomistic simulations and device physical modeling," 51th IEEE International Reliability Physics Symposium (IEEE IRPS), Monterey (CA), USA, April 14-18, 2013, pp. 5E.2.1-5E.2.6.

[C46] N. Raghavan, A. Padovani, X. Wu, K. Shubhakar, M. Bosman, L. Larcher and K.L. Pey "The “Buffering” Role of High-κ in Post Breakdown Degradation Immunity of Advanced Dual Layer Dielectric Gate Stacks," 51th IEEE International Reliability Physics Symposium (IEEE IRPS), Monterey (CA), USA, April 14-18, 2013, pp. 5A.3.1-5A.3.8.

[C45] (INVITED) L. Larcher, A. Padovani, O. Pirrotta, L. Vandelli, and G. Bersuker, "Microscopic understanding and modeling of HfO2 RRAM device physics," IEEE International Electron Devices Meeting (IEEE IEDM), San Francisco, California, CA, USA, 10-12 December, 2012, pp. 474-477.

[C44] F. M. Puglisi, P. Pavan, A. Padovani, L. Larcher, and G. Bersuker, "Random Telegraph Signal Noise Properties of HfOx RRAM in High Resistive State," 42nd European Solid-State Device Research Conference (ESSDERC), Bordeaux, France, 17 - 21 September, 2012, pp. 274-277.

[C43] F. M. Puglisi, A. Padovani, L. Larcher, and P. Pavan, "Perimeter and Area Current Components in HfO2 and HfO2-x MIM Capacitors," 17th Workshop on Dielectrics in Microelectronics (WODIM), Dresden, Germany, 25 - 27 June, 2012.

[C42] (INVITED) L. Larcher, A. Padovani, and P. Pavan, "Leakage current in HfO2 stacks: from physical to compact modeling," International Workshop on Compact Modeling, San Jose, CA, USA, 18-21 June, 2012, pp. 809-814.

[C41] G. Broglia, M. Montorsi, L. Larcher, and A. Padovani, "Density influence on amorphous HfO2 structure: a molecular dynamics study," Frontiers in Electronic Materials, Eurogress Aachen, Aachen, Germany, June 17-20, 2012, pp. 495-496.

[C40] A. Padovani, L. Larcher, P. Pavan, C. Cagli and B. de Salvo "Understanding the Role of the Ti Metal Electrode on the Forming of HfO2-based RRAMs," IEEE International Memory Workshop (IEEE IMW), Milano, May 21-23, 2012, pp. 127-130.

[C39] A. Kalantarian, G. Bersuker, D. C. Gilmer, D. Veksler, B. Butcher, A. Padovani, O. Pirrotta, L. Larcher, P. Kirsch, Y. Nishi "Controlling Uniformity of RRAM Characteristics via the Forming Process," IEEE International Reliability Physics Symposium (IEEE IRPS), Anaheim (CA), USA, April 15-19, 2012, pp. 6C.4.1-6C.4.5.

[C38] C. D. Young, G. Bersuker, M. Jo, K. Matthews, J. Huang, S. Deora, K.-W. Ang, T. Ngai, A. Padovani, L. Larcher, Chris Hobbs, and P.D. Kirsch "New Insights into SILC Monitoring During TDDB Stress," IEEE International Reliability Physics Symposium (IEEE IRPS), Anaheim (CA), USA, April 15-19, 2012, pp. 5D.3.1-5D.3.5.

[C37] (INVITED) A. Padovani, L. Larcher, L. Vandelli, O. Pirrotta, and P. Pavan, "Modeling the Charge Transport and Degradation in HfO2 Dielectric for Reliability Improvement and Life-Time Predictions in Logic and Memory Devices," IEEE International Semiconductor Device Research Symposium, University of Meryland, MD, USA, 7-9 December, 2011. (IEEEXplore link)

[C36] L. Vandelli, A. Padovani, L. Larcher, G. Broglia, G. Ori, M. Montorsi, G. Bersuker, and P. Pavan, "Comprehensive physical modeling of forming and switching operations in HfO2 RRAM devices," IEEE International Electron Devices Meeting, Washington, Washington DC, USA, 5-7 December, 2011, pp. 421-424.

[C35] C. Cagli, J. Buckley, V. Jousseaume, A. Salaun, H. Grampeix, J. F. Nodin, H. Feldis, A. Persico, J. Cluzel, P. Lorenzi, L. Massari, R. Rao, F. Irrera, T. Cabout, F. Aussenac, C. Carabasse, M. Coue, P. Calka, E. Martinez, L. Perniola, P. Blaise, Z.Fang, Y. H. Yu, G. Ghibaudo, D. Deleruyelle, M. Bocquet, C. Müller, A. Padovani, O. Pirrotta, L. Vandelli, L. Larcher, G. Reimbold, B. de Salvo, "Experimental and theoretical study of electrode effects in HfO2 based RRAM," IEEE International Electron Devices Meeting, Washington, Washington DC, USA, 5-7 December, 2011, pp. 658-661.

[C34] A. Kalantarian, G. Bersuker, D.C. Gilmer, B. Butcher, A. Padovani, L. Vandelli, L. Larcher, R. Geer, Y. Nishi, P. Kirsch, "Low Power RRAM with Improved HRS/LRS Uniformity through Efficient Filament Control Using CVS Forming," 42nd IEEE Semiconductor Interface Specialists Conference, December 1-3, 2011, Arlington, VA, paper 4.2.

[C33] (INVITED) A. Padovani, L. Larcher, and P. Pavan, "Modeling Strategies for Flash Memory Devices," 10th Workshop on Compact Modeling, Boston, Massachusetts, USA, June 15-16, 2011, pp. 762-767.

[C32] L. Vandelli, A. Padovani, L. Larcher, G. Bersuker, D. Gilmer, and P. Pavan, "Modeling of the forming operation in HfO2-base resistive switching memories," 3rd IEEE International Memory Workshop, Monterey (CA), USA, May 22-25, 2011, pp. 119-122.

[C31] L. Vandelli, A. Padovani, L. Larcher, G. Bersuker, J. Yum, and P. Pavan, "A physics-based model of the dielectric breakdown in HfO2 for statistical reliability prediction," IEEE International Reliability Physics Symposium, Monterey (CA), USA, April 10-14, 2011, pp. 807-810.

[C30] L. Larcher and A. Padovani, "Fundamental reliability issues of advanced charge-trapping Flash memory devices," 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Athens (Greece), December 12-15, 2010, pp. 1009-1012.

[C29] G. Molas, L. Masoero, P. Blaise, A. Padovani, J. P. Colonna, E. Vianello, M. Bocquet, E. Nowak, M. Gasulla, O. Cueto, H. Grampeix, F. Martin, R. Kies, P. Brianceau, M. Gély, A. M. Papon, D. Lafond, J. P. Barnes, C. Licitra, G. Ghibaudo, L. Larcher, S. Deleonibus, B. De Salvo "Investigation of the role of H-related defects in Al2O3 blocking layer of charge-trap memory retention by atomistic simulations and device physical modelling," IEEE International Electron Devices Meeting, San Francisco, California, 6-8 December, 2010, pp. 536-539. (IEEEXplore link)

[C28] G. Bersuker, D. C. Gilmer, D. Veksler, J. Yum, H. Park, S. Lian, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, M. Nafría, W. Taylor, P. D. Kirsch, R. Jammy "Metal Oxide RRAM Switching Mechanism Based on Conductive Filament Microscopic Properties," IEEE International Electron Devices Meeting, San Francisco, California, 6-8 December, 2010, pp. 456-459. (IEEEXplore link)

[C27] L. Morassi, A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G.Bersuker, "Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics," 19th European Workshop on Heterostructure Technology, Fodele, Crete, Grecia, 18-20 October 2010.

[C26] G. Bersuker, D. Heh, J. Huang, C.S. Park, A. Padovani, L. Larcher, P. Kirsch, R. Jammy, "Gate Leakage Current Reduction in Two-Step Processed High-k Dielectrics for Low Power Applications," International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, 22-24 September 2010, pp.1034-1035.

[C25] (INVITED) L. Larcher and A. Padovani, "High-k related reliability issues in advanced Non-Volatile Memories," Proc. of 21st European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), 2010.

[C24] S. Cimino, A. Padovani, L. Larcher, V.V. Afanas’ev, H. J. Hwang, Y. G. Lee, M. Jurczac, D. Wouters, B.H. Lee, H. Hwang, L. Pantisano, "Leakage Current in TiN/HfO2/TiN MIM Capacitors and Degradation due to Electrical Stress," 218th ECS Meeting, Las Vegas, Nevada (USA), 10-15 October 2010, abstract #1532. (ECS link)

[C23] L. Vandelli, A. Padovani, L. Larcher, R.G. Southwick III, W.B. Knowlton, and G. Bersuker, "Modeling Temperature Dependency (6 - 400K) of the Leakage Current Through the SiO2/High-K Stacks," European Solid-State Device Research Conference (ESSDERC), Siviglia, Spain, 13-17 September 2010, pp. 388-391. (IEEEXplore link)

[C22] V. Della Marca, F. Carboni, L. Larcher, A. Padovani, and P. Pavan, "SET switching effects on PCM endurance," European Solid-State Device Research Conference (ESSDERC), Siviglia, Spain, pp. 321-324. (IEEEXplore link)

[C21] A. Padovani and L. Larcher, "A Novel Algorithm for the Solution of Charge Transport Equations in MANOS Devices Including Charge Trapping in Alumina and Temperature Effects," Proc. of the International Conference on Simulation of Semiconductor Processes & Devices (SISPAD), Bologna, September 6-8, 2010, pp. 229-232. (IEEEXplore link)

[C20] H. Park, G. Bersuker, D. Gilmer, K. Y. Lim, M. Jo, H. Hwang, A. Padovani, L. Larcher, P. Pavan, W. Taylor, and P. D. Kirsch, "Charge loss in TANOS devices caused by Vt sensing measurements during retention," Proc. of IEEE International Memory Workshop, Seoul, Korea, May 16-19, 2010, pp. 175-176. (IEEEXplore link)

[C19] L. Vandelli, A. Arreghini, A. Padovani, L. Larcher, G. Van den bosch, V. Della Marca, P. Pavan, M. Jurczak, and J. Van Houdt "Role of holes and electrons during erase of TANOS memories: evidence for dipole formation and its impact on reliability," IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 731-737. (IEEEXplore link)

[C18] G. Bersuker, D. Heh, C. D. Young, L. Morassi, A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, "Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer," IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378. (IEEEXplore link)

[C17] L. Morassi, G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, Injo Ok, and G. Bersuker, "Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs," IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535. (IEEEXplore link)

[C16] L. Larcher, A. Padovani, V. Della Marca, P. Pavan and A. Bertacchini, "Investigation of trapping/detrapping mechanisms in Al2O3 electron/hole traps and their influence on TANOS memory operations," IEEE International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Taiwan, April 26-28, 2010, pp. 53-54. (IEEEXplore link)

[C15] (INVITED) G. Bersuker, D. Veksler, C. D. Young, H. Park, L. Morassi, A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy "Connecting electrical and structural dielectric characteristics," Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.

[C14] L. Morassi, L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, "Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing," 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.

[C13] S. Verma, G. Bersuker, D. C. Gilmer , A. Padovani, H. Park , A. Nainani, J. Huang, K. Parat, P. D. Kirsch, L. Larcher, H.-H. Tseng, K. C. Saraswat and R. Jammy, "Understanding endurance degradation in Flash memory through transconductance measurement," 6th International Symposium on Advanced Gate Stack Technology, San Francisco, California, August 23-26, 2009.

[C12] S. Verma, G. Bersuker, D. C. Gilmer, A. Padovani, H. Park, A. Nainani, D. Heh, J. Huang, J. Jiang, K. Parat, P. D. Kirsch, L. Larcher, H.-H. Tseng, K. C. Saraswat and R. Jammy, "A Novel Fluorine Incorporated Band Engineered (BE) Tunnel (SiO2/HfSiO/SiO2) TANOS with excellent Program/Erase & Endurance to 10E5 cycles," in IEEE International Memory Workshop, held in Monterey, California, 2009. (IEEEXplore link)

[C11] G. Bersuker, D. Heh, C. Young, H. Park, P. Khanal, L. Larcher, A. Padovani, P. Lenahan, J. Ryan, B. H. Lee, H. Tseng, and R. Jammy, "Breakdown in the metal/high-k gate stack: identifying “weak link” in the multilayer dielectric," IEEE International Electron Devices Meeting, San Francisco, California, 15-17 December, 2008, pp.791-794. (IEEEXplore link)

[C10] A. Padovani, L. Larcher, and P. Pavan, "Statistical simulations of high-k based non-volatile memory devices," poster session of the 38th European Solid-State Device Research Conference, Edinburgh, Scotland, 15-19 September 2008.

[C09] G. Puzzilli, F. Irrera, P. Pavan, L. Larcher, A. Arya, V. Della Marca, A. Padovani, and A. Pirovano, "On the RESET-SET Transition in Phase Change Memories," European Solid-State Device Research Conference, Edinburgh, Scotland, 15-19 September 2008, pp.158-161. (IEEEXplore link)

[C08] A. Padovani, L. Larcher, S. Verma, P. Pavan, P. Majhi, P. Kapur, K. Parat, G. Bersuker, and K. Saraswat, "Statistical modeling of leakage currents through SiO2/high-k dielectric stacks for non-volatile memory applications," IEEE International Reliability Physics Symposium, Phoenix, Arizona, 2008, pp. 616-620. (IEEEXplore link)

[C07] A. Padovani, L. Larcher, S. Verma, P. Pavan, P. Majhi, P. Kapur, K. Parat, G. Bersuker, and K. Saraswat, "Feasibility of SiO2/Al2O3 Tunnel Dielectric for Future Flash Memories Generations," International Conference on ULtimate Integration on Silicon (ULIS), Italy, 12-14 March, 2008, pp. 111-114. (IEEEXplore link)

[C06] L. Larcher, A. Padovani, I. Rimmaudo, P. Pavan, A. Calderoni, G. Molteni, F. Gattel, and P. Fantini, "Modeling NAND Flash memories for circuit simulations," International Conference on Simulations of Semiconductor Processes and Devices, Austria, 25-27 September, 2007, pp. 293-296.

[C05] A. Padovani, A. Chimenton, P. Olivo, P. Fantini, L. Vendrame, and S. Mennillo, "Statistical Methodologies for Integrated Circuits Design," Ph.D. Research in Microelectronics and Electronics, in Bordeaux, France, 2-5 July 2007, pp. 277-280. (IEEEXplore link)

[C04] A. Padovani, L. Larcher, A. Chimenton, P. Pavan, "Monte-Carlo Simulations of Flash Memory Array Retention," IEEE International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, 2007, pp. 156-157. (IEEEXplore link)

[C03] A. Padovani, L. Larcher, P. Pavan, "Hole Distributions in NROM Devices: Profiling Technique and Correlation to Memory Retention," IEEE International Reliability Physics Symposium, Phoenix, Arizona, 2007, pp. 654-655. (IEEEXplore link)

[C02] A. Padovani, L. Larcher, and P. Pavan, "Profiling charge distributions in NROM devices," Ph.D. Research in Microelectronics and Electronics, Otranto, Jun. 2006, pp. 69-72. (IEEEXplore link)

[C01] L. Avital, A. Padovani, L. Larcher, I. Bloom, R. Arie, P. Pavan, and B. Eitan, "Temperature Monitor: a New Tool to Profile Charge Distribution in NROM Memory Devices," IEEE International Reliability Physics Symposium, San Jose, California, 2006, pp. 534-540. (IEEEXplore link)

 

International Workshops and Meetings (without Proceedings)

[W-M05] O. Pirrotta, A. Padovani, and L. Larcher, "Modeling Oxygen Ion/Vacancy Diffusion in HfO2-based RRAMs," 3nd International Workshop on Non-Volatile Memory Modeling and Simulation (NVM2S), Agrate (MI), October 4-5 2012.

[W-M04] A. Padovani "Modeling of charge transport and degradation in HfO2-based stacks for RRAM and logic device applications," IEEE Invited Talk at the Microelectronic Centre, Nanyang Technologial University, Singapore, 11 Ottobre 2011.

[W-M03] A. Padovani, L. Vandelli and L. Larcher, "Physical modeling of HfO2 RRAM device operations," 2nd International Workshop on Non-Volatile Memory Modeling and Simulation (NVM2S), Agrate (MI), October 6-7 2011.

[W-M02] A. Padovani and L. Larcher, "Modeling MANOS memory device including charge trapping in Alumina and temperature effects," International Workshop on Non-Volatile Memory Modeling and Simulation (NVM2S), Agrate (MI), September 21-22 2010.

[W-M01] A. Padovani and L. Larcher, "A physics-based model for charge-trapping memory simulation," International MOS-AK/GSA Workshop, Roma, April 8-9 2010. (MOS-AK website)